A team of IISc researchers has developed a new framework for analog chipsets that will make AI-and ML-based applications run faster and more efficiently. The researchers named the new framework Aryabhat.
Artificial Intelligence and machine learning have been niche disciplines with limited implementation in mainstream computing and ge. This is mainly because users need powerful computing systems to use them.
This is likely to change as the next generation of analog computing chipsets become more efficient and faster in terms of performance.
Because a group of researchers at the Indian Institute of Science (or IISc) has developed a new design framework, we now have an analog chipset called Aryabhat-1, it will make artificial intelligence and machine learning applications better and faster.
Aryabhat-1, or analog reconfigurable technology and biased expandable hardware for AI tasks, is particularly useful for ai-based applications that deal with objects or speech recognition systems such as Alexa or Siri. They are also useful in operations that require high-speed large-scale parallel computing.
Most computing devices, whether your phone, laptop or desktop, use digital chips because the design process is simple and easy to scale. However, as Chetak Singh Thakur, an assistant professor at the IISc Department of Electronic Systems Engineering (Dese) , explains, the advantages of simulation are huge. You will get an order of magnitude improvement in power and size. In applications that do not require precise calculations, it is possible for analog computing to outperform digital computing because the former is more energy efficient.
Different ML architectures can be programmed on Aryabhat and, like most digital processors, can operate robustly over a wide range of temperatures, the researchers say.
They add that the architecture also has“Bias scalability”, where performance remains constant when operating conditions such as voltage or current are modified. This means that the same chipset can be configured for both ultra-energy-efficient Internet of things (IoT) applications and high-speed tasks such as object detection.
The design framework was developed as part of the work of IISc student Dr. Pratik Kumar and in collaboration with Shantanuchakrabartty, a professor at Washington University’s McKelvey School of Engineering in St. Louis, USA, he is also the university’s Macdonald College Ambassador to the IISc.
The researchers outlined their findings in two preprint studies that are now undergoing peer review. They have also applied for a patent and plan to commercialise the technology in partnership with industry partners.
